PDF) Low-power high-speed performance of current-mode logic D flip-flop topology using negative-differential-resistance devices
Design of Low Power and High-Speed Cmos D Flipflop using Supply Voltage Level (SVL) Methods
Help me calculate the device size of CML/SCL latch design and simulate the gain of it | Forum for Electronics
KR100969864B1 - Cml type d flip-flop and frequency divide-by-odd number using the same - Google Patents
adding reset function to D Flip FLOP | Forum for Electronics
Electronics | Free Full-Text | A Power Efficient Frequency Divider With 55 GHz Self-Oscillating Frequency in SiGe BiCMOS
Circuit configuration of the RTD/HBT MOBILE-based NRZ D-flip flop. | Download Scientific Diagram
adding reset function to D Flip FLOP | Forum for Electronics
Schematic timing diagram of the proposed NDR-based CML D flip-flop | Download Scientific Diagram
A Dynamic Current Mode D-Flipflop for High Speed Application
Schematic of standard CML master-slave D-flip flop. | Download Scientific Diagram
High speed CML latch using active inductor in 0.18μm CMOS technology | Semantic Scholar
Design of Low Voltage D-Flip Flop Using MOS Current Mode Logic (MCML) For High Frequency Applications with EDA Tool
Circuit configuration of the CML-type SR-latch circuit a Circuit... | Download Scientific Diagram
Current-Mode-Logic (CML) Latch | EveryNano Counts
adding reset function to D Flip FLOP | Forum for Electronics
High Speed Digital Blocks
Circuit configuration of the proposed NDR-based CML D flip-flop | Download Scientific Diagram
Figure 1 from A 45 mW RTD/HBT MOBILE D-Flip Flop IC Operating up to 32 Gb/s | Semantic Scholar
Schematic of standard CML master-slave D-flip flop. | Download Scientific Diagram
Advantages of Using CMOS - ppt video online download
Part 01: Proposal and Overview. Dual Modulus Prescaler Using Current Mode Logic Goals 2.5 GHz Operation 8/9 Dual Modulus 0.18uM BSIM 3 Model. - ppt download
Performance evaluation of the low-voltage CML D-latch topology - ScienceDirect
Electronics | Free Full-Text | 0.5-V Frequency Dividers in Folded MCML Exploiting Forward Body Bias: Analysis and Comparison
